LSI Logic's Leverage
RapidChip Heads to 90nm

What has over two million real ASIC gates, runs at over 200MHz with twenty levels of logic, burns about the power of a cell-based ASIC, and is economically feasible to deploy even in mid-to-small volume production? The answer is “Not an FPGA”. While these specs may sound close to the marketing picture painted by programmable logic vendors, there is a vast gulf between the brochure and real-world performance in an average application. Structured and platform ASICs, however, can realistically reach these goals in your average application, and getting design teams to understand that fact is one of the biggest challenges faced by structured ASIC marketers in working with design teams jaded by years of spin-laden specsmanship from the FPGA industry.

LSI logic announced this week that their increasingly successful RapidChip platform/structured ASIC family is headed to 90nm. While the step to the next process node may come as no surprise, the implications merit serious consideration, particularly for high-end FPGA customers who are either pushing the limits of FPGA technology or going into volumes where FPGA unit costs are prohibitive. It also means that platform ASICs are taking another giant bite out of the cell-based market space. With their 90nm announcement, LSI rolled out densities up to 10 million “these-are-not-the-same-as-system” ASIC gates. This upward leap in density clearly blows any lingering theory that the company might be protecting its cell-based offering by throttling back on structured ASIC. [more]